Short CV

Jean-Pierre Colinge received the Ph.D. degree in Applied Sciences from the Université catholique de Louvain (UcL), Belgium, in 1984. He then worked at the CNET, France, where he developed new silicon-on-insulator (SOI) and 3D integration technologies. From 1985 to 1988, he worked at the Hewlett-Packard Laboratories, Palo Alto, USA, where he was involved in thin-film SOI CMOS research. From 1988 to 1991, he was with IMEC, Belgium, where he was involved in SOI technology for VLSI and special device applications. From 1991 to 1997 he was professor at the UcL, working SOI technology for low-power, radiation-hard, high-temperature and RF applications as well as low-dimensional devices. He is now professor at the University of California. He has published over 250 scientific papers and three books on the field of SOI as well as two books on semiconductor device physics.

Lectures Abstract

Recommended Readings

General information on Books on SOI, SOI news, etc.:

SOI Products:

Fully Depleted SOI MOSFETs

Electrical Characterization of Silicon-on-Insulator Materials and Devices:

SOI Circuit Design Concepts:

CMOS VLSI Engineering: Silicon-on-Insulator (SOI):

SOI Design: Analog, Memory and Digital Techniques:

Silicon-on-Insulator Technology: Materials to VLSI, 3rd Edition:

Low-temperature operation

"Low temperature electronics: from fundamental physics to emerging silicon technologies", C. Claeys and E. Simoen, Electrochemical Society Proceedings, Vol. 2003-09, Ed. by. J.A. Martino, M.A. Pavanello and N. I. Morimoto, pp. 96-11, 2003;

Device and Circuit Cryogenic Operation for Low Temperature Electronics:

High-temperature operation: